Mentor Graphics Corporation: eg3.com electronic tearsheet


home > tearsheet central


Mentor Graphics Corporation: eg3.com electronic tearsheet

here is your current tearsheet, i.e., company listing, news releases, demo's, white paper, and other items being indexed by eg3.com. to update simply copy the text of an item, and email to info@eg3.com with the suggested changes. to submit a new item simply email to info@eg3.com. paper RTL Analysis and Creation using Spreadsheets Today millions of users depend on spreadsheets, the most popular being Microsoft Excel, to organize, manage, analyze, model and generate numerical and text data. Spreadsheets are now making their way into hardware design. This paper covers the details of using the Interface Based Design (IBD) editor provided by Mentor Graphics HDL Designer Series(tm) to develop spreadsheets for hardware design. http://www.mentor.com/products/fpga_pld/techpubs/mentorpaper_31725.cfm Classified with the keyword(s): chip design : eda (to change this item, email text via this submission form) paper Managing Timing Constraints with Precision Synthesis Managing timing constraints often seems like the painful but necessary evil of FPGA design. But 'proper constraints are part of proper FPGA design,' and adhering to a constraint methodology is important for implementing a design correctly. With more complex clocking schemes in today's FPGAs and the prevalence of high-speed I/O interfaces, constraint management is even more critical to system design. Without proper timing constraints,... http://www.mentor.com/products/fpga_pld/techpubs/requestpubs?selected=39890 Classified with the keyword(s): fpga : fpga (to change this item, email text via this submission form) webinar User Interface Development for Embedded Systems - Web Seminar A detailed look at user interface [UI] development for embedded systems. The range of UI types in a selection of embedded systems is reviewed and the accommodation and implementation of each one outlined. We take a more detailed look at menu-driven UIs, such as those found on mobile phones, set-top boxes and other 'smart' devices. The challenges entailed in creation, maintenance and expansion of such UIs are investigated. http://www.mentor.com/products/embedded_software/events/interface-development-web-seminar?int=1&i... Classified with the keyword(s): embedded software : gui embedded software : webinars (to change this item, email text via this submission form) paper Is SystemVerilog Only for System-Level Design SystemVerilog is not a completely new hardware description language (HDL). With its rich set of extensions to the existing Verilog HDL, SystemVerilog is fully backward compliant with Verilog. Many of these extensions to Verilog make it easier to create accurate, synthesizable models of designs of any size. These extensions also make SystemVerilog easier to use and are truly beneficial to every engineer currently working with Verilog. http://www.mentor.com/products/fpga_pld/techpubs/mentorpaper_31255.cfm Classified with the keyword(s): chip design : systemverilog fpga : vhdl (to change this item, email text via this submission form) demo Embedded Systems Evaluation Software Evaluation downloads include: Nucleus RTOS - Nucleus PLUS RTOS provides an extensive set of real-time services including task control, task communication, task synchronization, memory management and programmable timers; EDGE SimTest - a prototyping environment that enables you to build embedded applications on a development host such as Microsoft Windows, prior to embedding on target hardware; EDGE DevTools - an integrated development... http://www.mentor.com/products/embedded_software/evaluate.cfm Classified with the keyword(s): rtos : demo (to change this item, email text via this submission form) paper C++ for Embedded: Dos and Don'ts It took the arrival of very high quality code generation and transparent debugging for the industry to accept such new-fangled ideas, and that was only under the relentless pressure to become more productive. The obvious step on from C is C++. Even though its use for embedded software has steadily increased in recent years, it is far from universal. Why is that? http://www.mentor.com/products/embedded_software/techpubs/mentorpaper_28708.cfm Classified with the keyword(s): embedded software : c (to change this item, email text via this submission form) paper FPGAs: Fast Track to DSP DSPs are found throughout the world of electronic equipment, from cell phones to flat-screen TVs. Dedicated DSP processors and cores are still a widely popular means of achieving digital signal processing needs. But as CPUs have incorporated arithmetic coprocessors and extensions that optimize digital signal processing tasks, and as other silicon alternatives have emerged, the necessity of a separate DSP device is no longer viewed as... http://www.mentor.com/products/fpga_pld/techpubs/mentorpaper_11937.cfm Classified with the keyword(s): dsp : dsp chips fpga : fpga (to change this item, email text via this submission form) new product ZTE Licenses Mentor Graphics Inflexion UI Technology to Develop Advanced 3D Smartphone … Mentor Graphics Corp. (NASDAQ: MENT) today announced that ZTE Mobile Telecom, a global provider of wireless communication terminals, has selected the Mentor® Embedded Inflexion® UI product to develop its next-generation smartphone user interfaces (UIs). ZTE Mobile Telecom is rapidly expanding its smartphone portfolio and the selection of the Inflexion UI platform enables it to meet operator requirements for advanced 2D and 3D Android UIs,... http://www.mentor.com/company/news/zte-licenses-mentor-graphics-inflexion-ui-technology-to-develo... Classified with the keyword(s): embedded software : gui embedded software : news (to change this item, email text via this submission form) webinar Developing the Next Generation of Embedded GUIs Web Seminar LCD displays and touch screens are finding their way into an ever wider range of embedded products, from remote controls to refrigerators. In today’s competitive consumer markets, such products may succeed or fail on the strength of their graphical user interface: visual appeal and out-of-box usability are critical. But getting the GUI right – and doing it on budget and on time – presents a major challenge to developers, because every change... http://www.mentor.com/products/embedded_software/events/next-generation-embedded-gui-webseminar?i... Classified with the keyword(s): embedded software : gui embedded software : webinars (to change this item, email text via this submission form) webinar C++ for Embedded Applications - Web Seminar This session reviews in detail the utilization of C++ a an alternative to C for the implementation of embedded software. Key areas covered include: Useful C++ features for the embedded developer A C to C++ migration strategy A methodology for the encapsulation of expertise using C++ objects C++ and an RTOS What You Will Learn Those with a thorough knowledge of C and some awareness of C++ would be useful. Examples of code are... http://www.mentor.com/products/embedded_software/events/c-plus-web-seminar?int=1&id=44595&listid=... Classified with the keyword(s): embedded software : c embedded software : webinars (to change this item, email text via this submission form) seminar New SI Technologies for High-speed Designs Web Seminar Is your company introducing newer and faster technologies for next-generation designs? This technical seminar will focus on simulation-based signal-integrity analysis of several emerging technologies, including DDR, DDR2, PCI Express, SAS, and SATA. We'll introduce new Mentor design kits and explore the use of HyperLynx software for technology tradeoffs, termination, topology and routing decisions, and routing constraints, including... http://www.mentor.com/products/pcb/events/si_tech_highspeed.cfm?int=1&id=39005&listid=0624 Classified with the keyword(s): chip design : memory (to change this item, email text via this submission form) paper Incremental FPGA Synthesis As FPGA devices have grown larger and more complex, the design process has become more challenging. Designers must now contend with a large number of complex embedded blocks in a single FPGA. This increase in functionality has led to long runtimes and difficulties in achieving timing closure. As a result, designers have turned to incremental design to alleviate this problem; however, the currently available solution requires designers to... http://www.mentor.com/products/fpga_pld/techpubs/mentorpaper_32628.cfm Classified with the keyword(s): fpga : fpga (to change this item, email text via this submission form) news release Mentor Graphics Moves BridgePoint UML Editor to Open Source Domain Mentor Graphics Corp. (NASDAQ: MENT) announced its intention to place the front-end UML editor of its powerful BridgePoint™ xtUML environment into the open source domain. This action is intended to provide the system design community with broader access to comprehensive UML editing capabilities, encouraging advancement to powerful executable and translatable model-driven development. UML entry provides a starting point for model-driven... http://www.mentor.com/company/news/mentor-graphics-bridgepoint-uml-to-open-source Classified with the keyword(s): open source : eclipse open source : news embedded software : news embedded software : uml (to change this item, email text via this submission form) paper An ESL Methodology for Functional Verification between Untimed C++ and RTL using SystemC Many RTL designs are developed from C++ algorithms that have been extensively tested using a C++ testbench. The C++ testbench often represents a huge engineering effort to provide as much coverage of the algorithm as possible. Once the algorithm has been synthesized to RTL, however, a new testbench is typically written instead of using the original C++ testbench. This creates a discontinuity between the verification performed on the... http://www.mentor.com/products/esl/techpubs/mentorpaper_31761.cfm Classified with the keyword(s): chip design : eda chip design : systemc fpga : verification embedded software : c (to change this item, email text via this submission form) misc. 2008 PCB Technology Leadership Awards Welcome to Mentor Graphic’s 20th annual PCB Technology Leadership Awards (TLA) program - the most prestigious, international, independently judged contest in the industry. It is the only program that recognizes accomplishments of engineers and CAD professionals who are designing today’s increasingly complex electronic products in highly competitive markets. http://www.mentor.com/products/pcb/tla/index.cfm?v=mentorgraphics&p=handout:tla&a=print_card&g=sd... Classified with the keyword(s): busses and boards : pcb (to change this item, email text via this submission form) paper Physically Aware Synthesis Traditional physical synthesis techniques rely on lengthy place-and-route iterations to achieve good quality of results (QoR). Newer routing-centric approaches suffer from very long run times and limited device support while post-placement-centric physical synthesis provides only limited QoR improvements. To address these issues, a unique and innovative pre-place-and-route, physically-aware synthesis based on the concept of statistical... http://www.mentor.com/products/fpga_pld/techpubs/mentorpaper_31964.cfm Classified with the keyword(s): chip design : eda (to change this item, email text via this submission form) seminar Techniques for Routing High-Speed Designs Seminar Increasing bus speeds, faster switching speeds, and clock speeds that continue to increase at 40% a year are all causes of high-speed design problems and, hence, cause of concern to you, the PCB designer. PCB Designers need to ensure that their designs don't introduce delays or unintentionally create antennas that could lead to timing problems or logic failures. By carefully managing layer definition, trace coupling, and route widths and... http://www.mentor.com/products/pcb/events/high-speed_designs.cfm?PC=L&c=2008_08_techniques_for_ro... Classified with the keyword(s): busses and boards : pcb busses and boards : webinars (to change this item, email text via this submission form) paper FPGA Resource Management Producing optimal implementations for designs targeted to today's advanced FPGAs is increasingly dominated by the ability of the user to take advantage of dedicated resources such as block RAMs, multipliers and DSP blocks. What is needed is a way to give expert control to every user, providing early visibility into mapping choices and the ability to easily investigate alternate implementations. While synthesis tools do a good job of properly... http://www.mentor.com/products/fpga_pld/techpubs/mentorpaper_32284.cfm Classified with the keyword(s): fpga : fpga (to change this item, email text via this submission form) new product Mentor Graphics Announces Industry’s First Integrated Solution for Component-to-System… Mentor Graphics Corporation (NASDAQ: MENT) today announced the electronic industry’s first combined technology for thermal characterization and simulation with T3Ster® hardware test products and its FloTHERM® software. The Mentor Graphics® T3Ster product is the world’s leading advanced thermal transient tester for semiconductor device packages and LEDs. Mentor’s FloTHERM product is the de-facto standard for electronics thermal simulation and... http://www.mentor.com/company/news/mentor-thermal-characterization Classified with the keyword(s): io-protocols : news (to change this item, email text via this submission form) paper ASIC Prototyping with FPGAs Recently, there is a growing use of FPGAs to prototype ASICs as part of an ASIC verification methodology. With development costs for ASICs approaching $20M, avoiding a respin by prototyping with FPGAs is attractive alternative. This paper explorers the key issues designers should consider when developing and ASIC prototyping methodology. http://www.mentor.com/products/fpga_pld/techpubs/mentorpaper_33693.cfm Classified with the keyword(s): chip design : embedded asic design fpga : fpga (to change this item, email text via this submission form) blog Mentor Graphics Blogs Blogs from Mentor Graphics on the EDA space from an EDA vendor and thought leader. http://www.mentor.com/blogs/ Classified with the keyword(s): chip design : eda (to change this item, email text via this submission form) paper Demystifying UML What is UML-exactly? How is it being used? By whom? Are there many ways to use it, or is there one true way? Does it apply to embedded and real-time systems? How? Really? What are the popular ways to use UML? How effective has it been? Why are there so many tools? Why do they seem to be so different-even though UML is a standard? What should I look for in a tool? Will using UML change my development process? Make it faster? Or not? Build... http://www.mentor.com/products/embedded_software/techpubs/mentorpaper_28741.cfm Classified with the keyword(s): embedded software : uml (to change this item, email text via this submission form) archive Design-for-test Technical Publications Titles include * Embedded Deterministic Test for Low Cost Manufacturing (ITC 2002) * Reducing Simulation Mismatches in Design-for-Test (DFT) Implementation * TestKompress with EDT Technology: Reducing Time and Expense in Test * Embedded Deterministic Test - DFT Technology for Low-Cost IC Manufacturing Test * Using FastScan Diagnostics to Improve Time-to-Volume http://www.mentor.com/dft/techpapers/ Classified with the keyword(s): chip design : design for test chip design : design for manufacturability (to change this item, email text via this submission form) new product Mentor Graphics Partners with Freescale to Deliver Vista-based Virtual Prototype Solution… Mentor Graphics Corp. (NASDAQ: MENT) today announced it has signed a preferred, long-term partnership agreement with Freescale Semiconductor to deliver state-of-the-art, high-speed simulation platforms for Freescale’s QorIQ® P-Series, AMP and QorIQ Qonverge™ product lines of multicore embedded processors. In support of this partnership, Mentor® now offers a powerful virtual prototyping environment and enabling technologies which allow... http://www.mentor.com/company/news/mentor-vista-freescale Classified with the keyword(s): chip design : news (to change this item, email text via this submission form) new product Mentor Graphics Launches Next Generation Veloce2 Emulation Platform with VirtuaLAB Capabilities Mentor Graphics Corp. (NASDAQ: MENT), a leader in high-performance system verification solutions, today announced the availability of the Veloce®2 platform, the next-generation of emulation solutions for the verification of electronic system and Systems on Chip (SoC) designs. Built to accommodate up to two billion gate designs, the Veloce2 platform delivers twice the performance, twice the capacity and four times productivity gain in the... http://www.mentor.com/company/news/mentor-launches-next-generation-veloce2 Classified with the keyword(s): chip design : news fpga : verification (to change this item, email text via this submission form) new product Mentor Graphics Delivers Emulation-Ready Transactors for the Accelerated Verification of SoCs Mentor Graphics Corp. (NASDAQ: MENT), a leader in high-performance system verification solutions, today announced the availability of a set of protocol transactors for use with the Veloce® hardware emulation platform. The Veloce transactors enable the use of stimuli generated by modern simulation testbenches, including SystemVerilog/OVM and UVM, SystemC, and ‘C’- based environments, and apply them to the design-under-test (DUT) running in... http://www.mentor.com/company/news/mentor-emulation-ready-transactors Classified with the keyword(s): chip design : eda chip design : news (to change this item, email text via this submission form) new product Mentor Embedded Continues to Simplify Linux and Open Source Development with Support… Mentor Graphics Corporation (NASDAQ: MENT) is again simplifying Linux and open source development with the release of its next generation Mentor® Embedded Linux platform. The Mentor Embedded Linux platform includes support for the Yocto Project, an open source collaborative project established by The Linux Foundation. By leveraging the Yocto Project, the Mentor Embedded Linux platform helps developers easily build Linux-based embedded... http://www.mentor.com/company/news/mentor-embedded-continues-to-simplify-linux Classified with the keyword(s): embedded mcu's & mpu's : news rtos : embedded linux rtos : news rtos : rtos, commercial (to change this item, email text via this submission form) webinar Mentor Graphics (Archived) RoHS Compliance Webinars With deadlines fast approaching, companies are scrambling to ensure that their products comply with the regulations being established by the RoHS (Restriction of Hazardous Substances) directive, WEEE (Waste from Electrical and Electronic Equipment), and the Green Laws of Japan. http://www.mentor.com/products/pcb/rohs/index.cfm?v=274509&p=10700916&s=13053386&c=11561427&asid=... Classified with the keyword(s): industrial computing : rohs (to change this item, email text via this submission form) paper Creating a Consistent Verification Environment from Algorithm to RTL Hardware implementations of DSP designs typically start out as algorithms modeled in tools like Matlab(tm). Such tools provide a natural representation of the algorithm and an extensive collection of building blocks used to analyze algorithm performance, both quantitatively (S/N, BER, quantization errors, etc) and qualitatively (spectrum displays, processed image viewing, etc). They can also provide a quantitative analysis of possible fixed... http://www.mentor.com/products/esl/techpubs/mentorpaper_31816.cfm Classified with the keyword(s): chip design : eda dsp : algorithms fpga : verification (to change this item, email text via this submission form) paper Scoring with HDL Designer Have you ever wondered about the quality of code you are writing or that you plan to reuse from another engineer? Many teams have codified their RTL coding experiences into style guides providing rules and guidelines for creating designs. Unfortunately, these guides are rarely used or remembered. What if you could set up a tool that reflected your style guide? What if that tool could automatically provide you with a score representing the... http://www.mentor.com/products/fpga_pld/techpubs/mentorpaper_33224.cfm Classified with the keyword(s): fpga : verification fpga : vhdl (to change this item, email text via this submission form) paper Executive Presentation - Meeting the Critical Challenges of IC Implementation At the 2008 Design Automation Conference in June, Joseph Sawicki, vice president and general manager of the Design to Silicon Division, laid out Mentor’s strategy to help customers with the challenges they face with IC implementation as they move to smaller process nodes. Sawicki discusses new technology acquisitions and developments, product enhancements, and organizational alignment. He also describes how Mentor is driving toward the... http://www.mentor.com/products/ic_nanometer_design/events/ic_implementation.cfm?v=eg3&p=editorial... Classified with the keyword(s): chip design : design for test chip design : design for manufacturability chip design : eda fpga : verification fpga : verilog fpga : vhdl (to change this item, email text via this submission form) paper DO-254 Compliance: Reducing Project Cost by Avoiding Common Pitfalls Many folks stumble on very similar issues when they begin their journey towards creating and executing DO-254 compliant design projects. The good news is that each of these issues has solutions. Understanding these common pitfalls, and proactively addressing them before they cost a project time, resource and certification risk, is essential. Some of these common pitfalls, along with advice for addressing them (based on learnings from... http://www.mentor.com/products/fpga_pld/techpubs/requestpubs?selected=42422 Classified with the keyword(s): chip design : eda (to change this item, email text via this submission form) vendor Mentor Graphic ESL Microsite Mentor Graphics is a leader in the emerging ESL / EDA space. Here are vendor presentations as well as some great videos from DAC with discussions, technical white papers, and (of course) product demos of how Mentor is pushing the envelope of ESL. http://www.mentor.com/products/esl/index.cfm Classified with the keyword(s): chip design : esl (to change this item, email text via this submission form) new product Mentor Graphics and Mecel Announce the First Complete AUTOSAR 4.x Solution Mentor Graphics Corporation (NASDAQ: MENT) and Mecel AB announced today the availability of a solution for the design, configuration, generation, and implementation of an AUTOSAR Basic Software (BSW) solution for Versions 4.0.2 and 4.0.3. Mentor Graphics partnered with Mecel, a subsidiary of Delphi Automotive PLC (NYSE: DLPH), in the development of the industry’s first complete AUTOSAR 4.x solution for the automotive marketplace. AUTOSAR is... http://www.mentor.com/company/news/mentor-mecel-complete-autosar-solution Classified with the keyword(s): chip design : news industrial computing : automotive industrial computing : news (to change this item, email text via this submission form) new product Mentor Graphics New Questa Platform Functionality Boosts Productivity across… Mentor Graphics Corp. (NASDAQ: MENT) today announced the 10.1 release of the Questa® functional verification platform, a tightly integrated solution that is transforming the functional verification of complex System-on-Chip (SoC) and FPGA designs. This new release extends Mentor’s technology leadership in verification productivity with increased simulation and verification performance, enhanced support of the Universal Verification... http://www.mentor.com/company/news/mentor-questa-platform-functionality Classified with the keyword(s): fpga : fpga fpga : news fpga : verification (to change this item, email text via this submission form) new product Mentor Graphics and Ecrio Collaborate to Ready Powerful Nucleus-Based LTE… Mentor Graphics Corporation (NASDAQ: MENT) today announced the integration of Ecrio’s industry-leading IP Multimedia Subsystem (IMS) Device Software with its flagship Nucleus® Real Time Operating System (RTOS). The collaboration leads to the availability of the first IMS-based 4G SMS over LTE (IR.92 VoLTE-compliant) on-device networking stack for the Nucleus product. This technology makes it possible to run both SMS and VoIP services... http://www.mentor.com/company/news/mentor-ecrio-nucleus-lte-ims-mobile-platform Classified with the keyword(s): rtos : news rtos : rtos, commercial (to change this item, email text via this submission form) new product Mentor Graphics and Stonestreet One Announce Integrated Bluetooth Software Stack for Nucleus … Mentor Graphics Corporation (NASDAQ: MENT) today announced the integration of its flagship Nucleus® Real Time Operating System (RTOS) with the Bluetopia protocol stack from Stonestreet One, a leading provider of Bluetooth software. The third generation of the Nucleus RTOS provides built-in power management capabilities and connectivity features ideally suited for power sensitive, wireless communication applications. The Bluetopia stack is a... http://www.mentor.com/company/news/mentor-and-stonestreet-announce-integrated-bluetooth-software-... Classified with the keyword(s): wireless : bluetooth wireless : news (to change this item, email text via this submission form) seminar Introduction to Advanced Verification Web Seminar This presentation will walk the audience through various strategies for adopting an Advanced Verification. We will examine the different components including: Assertion-Based Verification Constrained-Random Verification Coverage-Driven Verification Testbench Automation ...and show how these techniques can be applied both incrementally to existing verification environments and in a proactive manner to build an infrastructure... http://www.mentor.com/products/fpga_pld/events/advanced-verification-intro.cfm?int=1&id=39001&lis... Classified with the keyword(s): fpga : verification fpga : webinars (to change this item, email text via this submission form) webinar Dynamic Memory Allocation & Fragmentation in C & C++ Web Seminar In C and C++, it can be very convenient to allocate and de-allocate blocks of memory as and when needed. This is certainly standard practice in both languages and almost unavoidable in C++. However, the handling of such dynamic memory can be problematic and inefficient. For desktop applications, where memory is freely available, these difficulties can be ignored. For embedded - generally real time - applications, ignoring the issues is not... http://www.mentor.com/products/embedded_software/events/dynamic-memory-allocation-webseminar/?int... Classified with the keyword(s): embedded software : embedded c embedded software : c embedded software : webinars (to change this item, email text via this submission form) webinar Embedded & Desktop Compilers - 'What's the difference?' Web Seminar A compiler is a tool that converts a high level programming language, like C or C++, into machine code (or assembly language) for a particular processor. It is always expected that a compiler will do a good job in making that conversion, generating optimal code as a result. Most modern compilers do perform excellent optimization, but they are also focused on the needs of desktop applications. Embedded systems place special demands on a... http://www.mentor.com/products/embedded_software/events/embedded-desktop-compilers-web-seminar/?i... Classified with the keyword(s): embedded software : compilers embedded software : webinars (to change this item, email text via this submission form) partners program Mentor Graphics PCB Service Bureaus PCB Service Bureaus from Mentor Graphics. Looking for companies that can design or fabricate boards for you? Consult one of the following PCB Service Bureaus. Use the pull-down menu to narrow the list to service bureaus in your area. All companies are listed alphabetically. http://www.mentor.com/products/pcb-system-design/service-bureaus/ Classified with the keyword(s): busses and boards : pcb services : partners (to change this item, email text via this submission form) archive Mentor Graphics IP Papers USB Technical Seminar Presentation SoC verification based on IP Reuse Methodologies An Approach to Rapid Implementation of Multiple Emerging Broadband Communications Standards: Parameterized Soft IP IP Reuse Creation for System-on-a-Chip Design When does it make sense to design for reuse? http://www.mentor.com/products/ip/techpubs/ Classified with the keyword(s): fpga : ip (to change this item, email text via this submission form) new product Mentor Graphics Announces PADS Release Targeting Design-for-Manufacturing (DFM) … Mentor Graphics Corporation, (NASDAQ: MENT), the worldwide market and technology leader in printed circuit board (PCB) design-through-manufacturing software, today announced the latest release of the PADS® product suite, the world’s most widely used desktop PCB design solution. These additional features in the release add significant value to electronics companies as they strive to deliver the most competitive, high-performance products to... http://www.mentor.com/company/news/mentor-release-pads-dfm-high-speed-interactive-routing Classified with the keyword(s): busses and boards : news busses and boards : pcb chip design : eda chip design : news (to change this item, email text via this submission form) webinar Expanding Your Design Capabilities with PADS Layout® Options On-Demand Web Seminar You already know that PADS Layout (PowerPCB) is the standard for Windows-based complex PCB layout, but you may not know everything it can do. Mentor Graphics cordially invites you to attend a FREE overview seminar to learn how you can expand the functionality of PADS Layout. Even if you've done hundreds of designs with PADS Layout, we'll bet there are capabilities you've left untouched. During this event, you will get an overview of... http://www.mentor.com/products/pcb/events/pads_layout_websem?int=1&id=43966&listid= Classified with the keyword(s): busses and boards : pcb busses and boards : webinars (to change this item, email text via this submission form) webinar Finding the toughest bugs with 0-In Formal Verification Web Seminar As designs get more complex, verification cycles increase dramatically while quality hangs in the balance. As a result, many companies are looking for a better methodology to help them achieve improved verification productivity, predictability and quality. This seminar explains how formal verification can most effectively be used alongside simulation to allow design and verification engineers to find more bugs, earlier in the design process. http://www.mentor.com/products/fv/events/0-in_fv_websem?int=1&id=44559&listid=0127 Classified with the keyword(s): chip design : webinars fpga : verification fpga : webinars (to change this item, email text via this submission form) new product Triad Semiconductor and Mentor Graphics Announce Low Cost Mixed-Signal… Triad Semiconductor and Mentor Graphics Corporation (NASDAQ: MENT) today announce a new approach to low cost, mixed-signal IC design, for the masses, with the introduction of ViaDesigner™. This unique offering enables new IC development in two to six months, allows respins in less than four weeks, and can radically reduce the cost and risk typically associated with custom mixed-signal IC design. ViaDesigner is a new electronic design... http://www.mentor.com/company/news/upload/mentor-triad-viadesigner_pdf Classified with the keyword(s): chip design : news (to change this item, email text via this submission form) company Mentor Graphics Corporation Mentor Graphics is a technology leader in electronic design automation (EDA), providing software and hardware design solutions that enable companies to develop better electronic products faster and more cost-effectively. The company offers innovative products and solutions that help engineers overcome the design challenges they face in the increasingly complex worlds of board and chip design. The Embedded Systems Division helps developers accelerate product time-to-market in a wide range of embedded applications. Mentor’s full-featured Nucleus Real Time OS incorporates services including real time kernel, networking, graphics, file system, USB and secure communications, complemented by EDGE developer suite including Eclipse-based IDE, optimized compilers, debuggers, profiler and simulation environment. [FPGA, ASIC, Embedded, RTOS, PCB] hhttp://www.mentor.com/ Classified with the keyword(s): embedded shows : m (to change this item, email text via this submission form) webinar The Ideal RTOS Web Seminar In a modern embedded system, all but the most simplistic software applications are based upon a real-time operating system [RTOS]. This software component may be purchased from a commercial vendor or developed in house. There are also alternative possible sources for the code. http://www.mentor.com/products/embedded_software/events/ideal-rtos-web-seminar?int=1&id=44599&lis... Classified with the keyword(s): rtos : rtos, commercial rtos : webinars (to change this item, email text via this submission form)

about eg3.com • add a site • advertise with us • contact us • © & disclaimer
help • keywords • search • site map • email: info@eg3.com • tel: 510.713.2150