overview

Boundary-Scan Tutorial
Since its introduction as an industry standard in 1990, boundary-scan (also known as JTAG) has enjoyed growing popularity for board level manufacturing test applications. Boundary-scan has rapidly become the technology of choice for building reliable high technology electronic products with a high degree of testability. Due to the low-cost and IC level access capabilities of boundary-scan, its use has expanded beyond traditional board test...
http://www.corelis.com/products/Boundary-Scan_Tutorial.htm

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• chip design : design for test

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paper

Using JTAG Emulation for Board-Level Functional Test
As chip packaging and interconnects become more dense and operate at higher clock frequencies, physical access for traditional bed-of-nails testing becomes limited. These results in loss of ICT (in-circuit test) fault coverage and higher test fixture costs. Reduced fault coverage, coupled with limited diagnostic resolution at ICT and FT (functional test), often add up to excessive debug times in ICT/FT repair stations. These costly,...
http://www.corelis.com/products/white_papers/ScanExpress_JET_White_Paper.pdf

Classified with the keyword(s):

• embedded mcu's & mpu's : debugger

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company

Corelis
Corelis offers a complete product line of Windows based boundary-scan (JTAG) tools, called ScanExpress, for scan chain integrity testing, interconnect testing, and in-system programming of flash memories and CPLDs. Corelis products also include functional test tools for at-speed testing of peripherals attached to embedded microprocessors as well as bus analysis hardware for I2C interfaces. Additional Suggested Keywords: IEEE-1149.1,...
http://www.corelis.com/

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