| | | Cadence Design Systems, Inc.: eg3.com electronic tearsheet
| | | | here is your current tearsheet, i.e., company listing, news releases, demo's, white paper, and other items being indexed by eg3.com. to update simply copy the text of an item, and email to info@eg3.com with the suggested changes. to submit a new item simply email to info@eg3.com.
-
new product
-
Cadence Announces Support for New Interface Verification IP for Development of Cloud Infrastructure
Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced the company is adding support for two popular protocol standards used in cloud computing applications, 12Gb/s SAS and NVM Express, to the Cadence Verification IP (VIP) Catalog. The expanding VIP Catalog is helping leaders in the networking market, like AppliedMicro, to deliver the systems and SoCs powering cloud-based computing. Ca...
http://www.cadence.com/cadence/newsroom/press_releases/pages/pr.aspx?xml=032612_cloud_vip
Classified with the keyword(s):
- fpga : news
- fpga : verification
(to change this item, email text via this submission form)
-
new product
-
Cadence Announces Production Release of Virtual Platform for Xilinx Zynq-7000 Extensible…
Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced that the company’s virtual platform for the Xilinx Zynq™-7000 Extensible Processing Platform (EPP) is available as a production release. Designed to streamline the embedded software development process, the virtual platform enables simultaneous development of hardware and software before hardware availability, providing significant...
http://www.cadence.com/cadence/newsroom/press_releases/pages/pr.aspx?xml=022712_zynq7000
Classified with the keyword(s):
(to change this item, email text via this submission form)
-
new product
-
Cadence Expands Proven Ethernet IP Offering with 40/100 Gigabit Ethernet Solution
Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced 40/100 Gigabit Ethernet (GbE) media access controller (MAC) and physical coding sub-layer (PCS) IP cores that enable the rapid deployment of SoCs for networking and high-performance computing. With more than 50 tape-outs of Ethernet designs spanning from 1 GbE up to 40 GbE, Cadence offers both the design IP and integration support...
http://www.cadence.com/cadence/newsroom/press_releases/pages/pr.aspx?xml=022112_ethernet
Classified with the keyword(s):
- io-protocols : ethernet
- io-protocols : news
(to change this item, email text via this submission form)
-
blog
-
Cadence Industry Insights Blog - EDA
EDA news and blogs from the perspective of Cadence. The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information.
http://www.cadence.com/community/blogs/ii/
Classified with the keyword(s):
- chip design : eda
- chip design : publications
(to change this item, email text via this submission form)
-
company
-
Cadence Design Systems, Inc.
Cadence enables global electronic-design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software and hardware, methodologies, and services to design and verify advanced semiconductors, printed circuit boards and systems used in consumer electronics, networking and telecommunications equipment, and computer systems. [EDA, PCB, nanometer, OrCAD]
http://www.cadence.com/
Classified with the keyword(s):
(to change this item, email text via this submission form)
-
new product
-
Cadence Delivers High-Performance, Low-Power Design IP Supporting LPDDR3 Memory Standard
Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced the addition of design intellectual property (IP) for the LPDDR3 mobile memory standard to the company’s design IP portfolio. Designed to provide the high bandwidth and low power consumption required by smartphones and tablets, the Cadence LPDDR3 memory IP solution includes integrated controller and PHY support, virtual prototyping,...
http://www.cadence.com/cadence/newsroom/press_releases/pages/pr.aspx?xml=032112_LPDDR3
Classified with the keyword(s):
- fpga : ip
- io-protocols : news
(to change this item, email text via this submission form)
-
new product
-
Cadence Accelerates High-Performance, Giga-scale, 20nm Design with Next-generation …
Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today introduced the latest release of Cadence® Encounter® RTL-to-GDSII flow for high-performance and giga-scale designs, including those at the latest technology node, 20 nanometers. Developed in close collaboration with leading IP and foundry partners and customers, the new RTL-to-GDSII design, implementation and signoff flow enables more...
http://www.cadence.com/cadence/newsroom/press_releases/pages/pr.aspx?xml=030512_digital
Classified with the keyword(s):
- chip design : eda
- chip design : news
(to change this item, email text via this submission form)
-
archive
-
Cadence (EDA) Webinar Archive
Cadence is a leading vendor in the EDA space. This is their archive of webinars on topics as varied as verification, EDA, SystemVerilog, Verification, PCB design and more. Examples: Increase Verification Productivity with SystemVerilog Testbench * Design Foundations—Addressing the Gap between Theory and Practice * Increase Verification Productivity with Formal Verifier * Using the OVM and SystemVerilog for Coverage-Driven Verification *...
http://www.cadence.com/cadence/events/pages/default.aspx
Classified with the keyword(s):
- chip design : eda
- chip design : webinars
(to change this item, email text via this submission form) | | | | | | | | |
| | |
