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AutoESL Design Technologies
The AutoPilot tool from AutoESL provides novel platform-based, communication-centric ESL synthesis flow synthesis flow that automatically generates high-quality RTL code from behavior-level and system-level SystemC/C descriptions for design and implementation of application-specific integrated circuits (ASICs), Structured ASICs, and field-programmable gate arrays (FPGAs).
http://www.autoesl.com/
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