Best Practices and Methods for Mixed-Signal Verification
Is mixed-signal verification a major bottleneck within your IC design and verification flow? Are you part of an analog/mixed-signal design team that is required to deliver a high-quality functional 'digital-ONLY' simulation net list to a digital verification organization as part of SoC verification? If you answered yes to the above questions, attend this webinar and learn how Cadence' Services can help you: * Reduce ris
preview:
http://www.techonline.com/learning/livewebinar/221400054
11/2005/2009
