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 TimingTool LiteTimingTool is fully featured and includes VHDL and Verilog Testbench generation, Timing Analysis, a powerful macro language, parameter tables, web integration and html/pdf publishing. All students, trainers and academic staff can now use TimingTool free of charge for non-commercial use.
 preview: http://www.timingtool.com/ 10/15/2004Tags: verilog, vhdl
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