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 Source-Level Debugging of VHDL Designs: Models, Methods and ToolsAs design density and complexity of digital systems increase, the costs due to design faultsincrease exponentially. Therefore, detecting, localizing, and correcting faults are crucial issuesin today`s fast-paced and fault-prone development process. Test case generation and verificationtools detect faults and provide the user with a failing run. Even with a detailed failing run inhand, locating and correcting a fault is a bland and...
 preview: http://www.amazon.com 8/27/2008Tags: vhdl
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