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overview
 Verilog @ Wikipedia
Verilog is a hardware description language (HDL) used to model electronic systems.
The language (sometimes called Verilog HDL) supports the design, verification, and implementation of analog, digital, and mixed-signal circuits at various levels of abstraction.
The designers of Verilog wanted a language with syntax similar to the C programming language so that it would be familiar to engineers and readily accepted.
The language is...
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http://en.wikipedia.org/wiki/Verilog
6/6/2007
Tags: verilog
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