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book
 Functional Verification of Programmable Embedded Architectures
Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current System-on-Chip design methodology.
A critical challenge in validation of such systems is the lack of a golden reference model.
As a result, many existing validation techniques employ a bottom-up approach to design verification, where the functionality of an existing architecture is, in...
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http://www.amazon.com
10/28/2005
Tags: verification
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