DVCon is the premier conference on the usage of Hardware Description Languages (HDLs), and Hardware Verification Languages (HVLs) for the design and verification of electronic systems and integrated circuits.
The focus of the conference is on specialized languages such as VHDL, PSL, Verilog, SystemVerilog, SystemC, SUPERLOG, e and VERA . . .
Tags: conferences, systemc, verification, vhdl