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SystemC Tutorial for VHDL Engineers

On the next few web pages you will find a brief tutorial on the powerful SystemC programming language. The tutorial is mainly targeted at the VHDL engineer but Verilog users should have no problem understanding the comparative VHDL examples and language constructs given. No C++ knowledge is required, however, it is advisable to study some C and C++ constructs and methodologies during the tutorial. This tutorial discusses SystemC at the so...
Click here to preview in another window preview: http://www.ht-lab.com/howto/vh2sc_tut/vh2sc_tut.html   9/22/2008

Tags: systemc