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FPGA's 101 - Amazing New FPGA in Embedded Book

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Reduce Energy Consumption for Datapath Designs

While many designers have employed low power design techniques to turn off parts of SoCs to reduce power, the chips cannot be completely shut down during operation. Circuits such as wireless receivers, audio/video processors, and DSP blocks, though designed to be low power, still have higher energy footprint for their extended active time. In this webinar:
Click here to preview in another window preview: http://www.techonline.com/learning/livewebinar/219401452   9/19/2009

Tags: low power, webinars