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FPGA's 101 - Amazing New FPGA in Embedded Book

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Design of a FIR filter using a FPGA

A modification of the filter design described in Arcetri Technical Report N 5/2002 is presented. The overall structure is similar, but the the digital local oscillator is moved after the first filter and after the frequency decimation. With this modification the design proposed here presents some advantage in terms of gate usage and spectral dynamic range.
Click here to preview in another window preview: http://www.arcetri.astro.it/science/Radio/alma/fir3b.pdf   10/13/2003

Tags: filters