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paper
 Creating a Consistent Verification Environment from Algorithm to RTL
Hardware implementations of DSP designs typically start out as algorithms modeled in tools like Matlab(tm). Such tools provide a natural representation of the algorithm and an extensive collection of building blocks used to analyze algorithm performance, both quantitatively (S/N, BER, quantization errors, etc) and qualitatively (spectrum displays, processed image viewing, etc). They can also provide a quantitative analysis of possible fixed...
preview:
http://www.mentor.com/products/esl/techpubs/mentorpaper_31816.cfm
4/10/2007
Tags: algorithms, eda, verification
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