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project
 Alliance - a free VLSI CAD System
Alliance is a complete set of free CAD tools and portable libraries for VLSI design.
It includes a VHDL compiler and simulator, logic synthesis tools, and automatic place and route tools.
Advanced verification tools for functional abstraction and static timing analysis are part of the system.
A complete set of portable CMOS libraries is provided, including a RAM generator, a ROM generator and a data-path compiler.
preview:
http://www-asim.lip6.fr/recherche/alliance/
8/1/2000
Tags: cad, vhdl
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