| |
-
tutorial
 Testbench.in - ASIC Functional Verification Tutorial
There are many sources available for basic VLSI/DIGITAL and Hardware Description Languages(HDL's). As the Verification becomes the more and more complex and important there is a need of Hardware Verification Languages (HVL's) like Systemverilog, OpenVera... etc and Methodologies.
But there isn't any great source available for Hardware Verification Languages(HVL's) and Methodologies.
What's on this site : We believe the best and easiest...
preview:
http://www.testbench.in/
07/21/2008
Tags: asic, systemverilog, verification, verilog
 |
