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	JTAG CoreCommander checks-out FPGA Zone | Green Hills Software Announces INTEGRITY RTOS and MULTI IDE Support for Altera's … . . . last week's e-clips alert for cores
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Express Logic develops, markets and supports the ThreadX® real-time operating system (RTOS), NetX™TCP/IP networking stack, USBX™ USB stack, FileX® embedded file system, and PEGX™ GUI toolkit for embedded applications. ThreadX is a royalty-free, full source code, small-footprint, low-overhead RTOS that is extremely easy to learn and use. ThreadX is one of the most widely deployed RTOS products in the world, with over 1.25 billion products based on ThreadX.

Definition: In electronic design a semiconductor intellectual property core, IP block, IP core, or logic core is a reusable unit of logic, cell, or chip layout design and is also the intellectual property of one party. IP cores may be licensed to another party or can also be owned and used by a single party alone. The term is derived from the licensing of the patent and source code copyright intellectual property rights that subsist in the design. IP cores can be used as building blocks within ASIC chip designs or FPGA logic designs. In digital-logic applications, IP cores are typically offered as generic gate netlists. The netlist is a boolean-algebra representation (gates, standard cells) of the IP's logical-function, analogous to an assembly-code listing for a high-level program application. The netlist protects the vendor against reverse-engineering, while maintaining portability to multiple foundry targets. Some vendors also offer synthesizable versions of their IP cores. Synthesizable cores are delivered in a hardware description language such as Verilog or VHDL, permitting customer modification (at the functional level). Both netlist and synthesizable cores are called 'soft cores', as both follow the SPR design-flow (synthesis, placement and route.) Source: Wikipedia (http://en.wikipedia.org/wiki/Semiconductor_intellectual_property_core)