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Today's high-speed serial standards require jitter measurements, interconnect characterization, and quality probing to characterize your design. Consult our wide range of application notes, application seminars, product demos, and more. Click here to learn more about your design through better measurements www.agilent.com/find/si !

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webinar    

Accurate Transient Simulations at Gigabit/s Data Rates
The latest release of ADS features a rich set of technologies for rigorous, accurate and robust transient (SPICE) simulation of high speed circuits. This talk will focus on breakthrough improvements to the high frequency transient simulation technology in ADS, introducing several powerful techniques for causality correction and passivity enforcement. We discuss new and rigorous approaches to delay causality enforcement and optimal techniques...
preview: http://www.techonline.com   date: 3/15/2007

webinar    

Advanced Validation and Testing of PCIe2®
PCI EXPRESS® brought about a whole new series of challenges for designers and the next generation, PCI EXPRESS 2.0 takes the challenges to a new level. Doubling the speed of the link to 5GT/s while maintaining backwards compatibility with PCI EXPRESS 1.0 potentially opens up interoperability issues. These issues must be addressed and ruled out at design and validation time. Advanced validation of all layers from the Physical Layer to the...
preview: http://www.techonline.com   date: 5/14/2008

webinar    

Best of Breed PCI Express IP and VIP Solution for SOC Designers
This webinar describes the best-of-breed PCI Express® solution collaboratively developed by Rambus and Cadence. It is engineered to provide the optimal integration and verification experience for Rambus and Cadence customers. This collaboration results in several significant advantages to customers: reduced IP integration effort and time, increased product quality and predictability, and shortened time to market. The joint solution now...
preview: http://www.techonline.com   date: 2/12/2008

webinar    

Demystifying PCI Express 1.1 for New Designs
What do you need to know about physical layer compliance measurements under the PCI Express 1.1 specification? Enforcement of the PCI Express 1.1 standard will soon be required by the PCI-Sig for vendors who wish to have their products listed on the PCI-Sig's PCI Express Integrators List. Significant changes in jitter and PLL loop bandwidth were instituted with this change from the PCIe 1.0a specification. This presentation details what you...
preview: http://www.techonline.com   date: 1/24/2007

webinar    

Designing for High Performance PCI Express to PCI/X Bridging
Tundra Semiconductor will be delivering an in-depth presentation on optimizing applications using PCI Express bridges. Applications covered will include video security, embedded computing, PC add-in cards, storage adapters and riser cards. Tundra will cover the challenges that designers need to be aware of when bridging between PCI Express and PCI/X. These challenges include performance, power consumption, design complexity, cost and...
preview: https://event.on24.com   date: 6/26/2008

webinar    

Discover How the Complete Virtex-5 PCI Express Solution Reduces Risks for Your Application
PCI Express is one of the fastest growing high-speed serial interconnects. Its scalability while preserving existing investments in software make it an ideal choice for a variety of applications in communications embedded, storage, server and mobile markets.
preview: http://www.techonline.com   date: 4/3/2007

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