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webinar    

Finding the toughest bugs with 0-In Formal Verification Web Seminar
As designs get more complex, verification cycles increase dramatically while quality hangs in the balance. As a result, many companies are looking for a better methodology to help them achieve improved verification productivity, predictability and quality. This seminar explains how formal verification can most effectively be used alongside simulation to allow design and verification engineers to find more bugs, earlier in the design process.
preview: http://www.mentor.com   date: 1/27/2009

webinar    

Accelerate FPGA Designer Productivity with ISE Design Suite
Even with programmable designs targeting today's fastest FPGAs, achieving aggressive goals for performance, power, and cost can be an overly time consuming task, especially with shrinking product schedules and other development pressures. With the typical design flow involving multiple passes through the implementation process, engineers need a way to shorten subsequent iterations. Verification of larger and larger designs can monopolize...
preview: http://www.techonline.com   date: 11/17/2009

webinar    

Accelerate System Design Innovation and Slash Infrastructure Development Time with FPGA-Based
Base Targeted Design Platforms combine with optimized development tools to enable simpler and smarter design methodologies for creating FPGA-based system-on-chip solutions targeting a wide variety of markets and applications. Boosting designers so they can take innovation to a higher level, these integrated platforms of hardware, software, IP and targeted reference designs deliver productivity gains that greatly exceed the...
preview: http://www.techonline.com   date: 7/14/2009

webinar    

Accelerating High-Bandwidth System Design Implementations with FPGA-based platforms
FPGAs provide multi-gigabit serial transceivers to implement high-speed serial protocols and have become the platform of choice for a large and growing number of applications today. In addition to providing flexibility for system design implementation through the FPGA architecture, designs can also be easily modified to meet different performance requirements and support legacy and newer serial / parallel protocols to reduce development and...
preview: http://www.techonline.com   date: 1/26/2010

webinar    

Achieve greater productivity and ease of use with Targeted Design Platforms enabled by....
The Xilinx Virtex®-6 and Spartan®-6 FPGA families are the programmable silicon foundation for Targeted Design Platforms that enable system designers to increase productivity and minimize development costs in applications targeting wireless, wired, audio, video, automotive, security and many other markets. The mix of programmable logic and on-chip configurable hard IP built using the latest process technology enables Xilinx Virtex-6 and...
preview: http://www.techonline.com   date: 2/17/2009

webinar    

Achieving Predictable Success in FPGA Design
Join Synopsys for this three part webcast for serious FPGA designers. The sessions will introduce you to tools that provide more productive and predictable design and verification techniques. * Part 1: Synthesis and Timing Closure * Part 2: Algorithmic Model-based Design * Part 3: FPGA Design Verification If you design FPGAs, do ASIC prototyping using FPGAs or work in a system-level environment, you won't want to miss...
preview: http://www.techonline.com   date: 6/18/2009

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