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AlternateVerilog FAQ
Alternate Verilog FAQ is an attempt to gather the answers to most Frequently Asked Questions about Verilog HDL in one place. It also contains list of publications, services, and products. Alternate Verilog FAQ is divided into three logical parts. Part 1 : Introduction and misc. questions Part 2 : Technical Topics Part 3 : Tools and Services
preview: http://www.angelfire.com   |

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Designers' Guide to Verilog
Doulus, inc., provides this useful guide to Verilog.
preview: http://www.doulos.com   |

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Interactive Verilog FAQ/hint page
Verilog help is Here!With an Interactive Verilog FAQ / Hint page. Post Your Verilog questions, Search for an answer, or answer a question someone else left!.
preview: http://www.jmlzone.com   |

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On-line Verilog HDL Quick Reference Guide
* Hierarchy Scopes * Concurrency * Reserved Keywords * Lexical Conventions * Module Definitions * Module Port Declarations * Data Type Declarations * Module Instances * Primitive Instances * Procedural Blocks * Operators * Continuous Assignments * Task Definitions * Function Definitions * Specify Blocks * User Defined Primitives * Synthesis Constructs * System Tasks and Functions * Compiler Directives
preview: http://www.sutherland-hdl.com   |

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Verilog @ Wikipedia
Verilog is a hardware description language (HDL) used to model electronic systems. The language (sometimes called Verilog HDL) supports the design, verification, and implementation of analog, digital, and mixed-signal circuits at various levels of abstraction. The designers of Verilog wanted a language with syntax similar to the C programming language so that it would be familiar to engineers and readily accepted. The language is...
preview: http://en.wikipedia.org   |

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VHDL and Verilog Quick Reference
Verilog and VHDL Quick Reference Cards from Comit provide concise HDL Language Reference Manuals in a compact (4in x 8.5in), convenient, neatly designed tri-fold package. Please click on the buttons below to download PDF versions of these.
preview: http://www.comit.com   |