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Programmable Logic Device Resources
* Tutorials * FAQ * Newsgroups * Publicly Available Sites * 3rd Party Software Vendors * PLD Vendors * SOC Vendors
preview: http://www.brunham.net   |

article    

Use a CPLD in your Next Design
CPLDs or Complex Programmable Logic Devices are the next extension to the PLD market. They are today's technological stepping stone between a handful of discrete gates and a full custom design. What's more, the silicon manufacturers are so interested in beginning engineers down the path of brand loyalty, that one & two quantity pricing is around five dollars for surprisingly powerful devices. At the same time, entry level software...
preview: http://www.seattlerobotics.org   |

paper    

Getting Started with CPLDs
What is a CPLD? A CPLD is a combination of a fully programmable AND/OR array and a bank of macrocells. The AND/OR array is reprogrammable and can perform a multitude of logic functions. Macrocells are functional blocks that perform combinatorial or sequential logic, and also have the added flexibility for true or complement, along with varied feedback paths.
preview: http://www.xilinx.com   |

seminar    

Paid Seminar': Understanding Programmable Logic Controllers
Mainly for end-users, but: During this three day session you will spend approximately 50% of the time actually working with various programmable controllers in a small group learning to program, connecting input/output devices, solving elementary and then more complex problems, and troubleshooting. Approximately 50% of the time will be spent in lecture session . . . [Paid Tutorial - Various Locations, USA]
preview: http://www.nttinc.com   |

organization    

NASA Office of Logic Design
Selected Papers 'A Comparison of Bus Architectures for Safety-Critical Embedded Systems,' John Rushby 'Apollo Spacecraft,' George Low, NASA MSC Office of Logic Design Seminars and Workshops 'Back to the Moon: The Verification of a Small Microprocessor's Logic Design' - (September 19, 2007) 'Engineering Aspects of the Lunar Orbiter Laser Altimeter (LOLA) Digital Unit Design' - (October 17, 2007) OLD Seminar Archive...
preview: http://www.klabs.org   |

webinar    

Combining Legacy FPGA and CPLD Designs to Create a New Xilinx Virtex-5 Design
Few engineers have the luxury of creating their Virtex-5 designs from scratch; typically they reuse HDL code written earlier or even schematics that were archived with some legacy designs. Incorporating old sources into a new design is only a half of the problem: things get complicated when old code has to be analyzed and modified. This webinar will provide an overview of Virtex-5 Technology and
preview: http://www.aldec.com   date: 02/12/2009 |