 
SHARC Processor Evaluation Kit Limited Time Offer
Analog Devices is offering a 50% discount on new SHARC Processor Family evaluation kits until July 31, 2008.
The SHARC Processor fits into a variety of applications such as Digital Home, Pro Audio, Industrial and Instrumentation, Automotive, Military, and Medical.
The following kits will be discounted to $249 through your local Distributor: ADZS-21262-EZLITE, ADZS-21364-EZLITE, ADZS-21369-EZLITE, and ADZS-21375-EZLITE.
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rtos
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C/OS-II
µC/OS-II, The Real-Time Kernel is a highly portable, ROMable, very scalable, preemptive real-time, multitasking kernel (RTOS) for microprocessors and microcontrollers. µC/OS-II can manage up to 63 application tasks.
Over 100 microprocessor ports available to DOWNLOAD.
preview:
http://www.micrium.com
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rtos
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ThreadX®
ThreadX is the leading royalty-free real-time operating system (RTOS) for embedded applications.
ThreadX offers the lowest cost solution among commercial RTOSes, the highest performance, and the greatest ease of use. It has been deployed in over 450 million manufactured products, making it among the most widely deployed RTOS products in the world.
ThreadX is provided in full source code form and is 100% royalty-free.
preview:
http://www.rtos.com
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hot list
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FPGA and other programmable logic ICs
FPGA is an integrated circuit that contains many (64 to over 10,000) identical logic cells that can be viewed as standard components.
Each logic cell can independently take on any one of a limited set of personalities.
The individual cells are interconnected by a matrix of wires and programmable switches.
preview:
http://links.epanorama.net
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misc.
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Programmable Technologies Web Site
This web site is dedicated to the design and use of programmable and quick-turn technologies for space flight applications, focusing on the use of FPGAs and ASICs.
Many papers available in PDF and HTML.
preview:
http://klabs.org
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engine
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FPGAseek - specialized FPGA search engine
This is a 'filtered' search via Google of the major FPGA vendors.
Interesting, but is it really useful? You decide.
preview:
http://www.fpgaseek.com
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With PADS® I/O Designer, you can easily create legal FPGA pin assignments—up to 50% times faster—with its correct-by-construction, drag and drop functionality.
By reducing design cycle time, I/O Designer accelerates time to market, enabling your company to compete in the ever-changing electronics market.
I/O Designer follows major FPGA vendor rules for correct I/O assignments.
It also eliminates re-spin risk, improves PCB performance, and reduces routing congestion.
View the free demo.
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