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Chipvision Delivers Two Breakthrough Esl Power-optimization Design Tools For ...
ChipVision Design Systems, the low-power specialist in electronic design automation (EDA), today announced two breakthrough products PowerOpt and P-SAM that help companies meet their power budget requirements early in the design cycle.
The new tools are ideal for companies developing mobile communications, networking, consumer or automotive applications that need extended battery life or reduced cooling requirements.
ChipVision will...
preview:
http://www.chipvision.comdate: 5/5/2008
Microsoft Windows Embedded - Try it free!
news release
CoWare Introduces First Ever Checkpoint / Restart Capability for Native SystemC Virtual Platforms
CoWare®, Inc., the leading supplier of platform-driven electronic system-level (ESL) design software and services, announced today the first ever checkpoint/restart capability for native SystemC Virtual Platforms.
Debugging is generally accepted as the most time consuming phase of the development process.
This new capability provides unprecedented debugging productivity for software developers by letting them focus on the execution sequence...
preview:
http://www.coware.comdate: 5/2/2008
news release
CoWare Introduces First Ever Checkpoint / Restart Capability for Native SystemC Virtual Platforms
CoWare®, Inc., the leading supplier of platform-driven electronic system-level (ESL) design software and services, announced the first ever checkpoint/restart capability for native SystemC Virtual Platforms.
Debugging is generally accepted as the most time consuming phase of the development process.
This new capability provides unprecedented debugging productivity for software developers by letting them focus on the execution sequence...
preview:
http://www.coware.com.date: 4/23/2008
new product
Xilinx XtremeDSP Solution Development Tools Deliver New Levels of DSP and ESL Design Capabilities
Xilinx, Inc. (Nasdaq: XLNX), the world's leading provider of programmable solutions, today announced the availability of versions 10.1 of the System Generator for DSP tool and the AccelDSP(TM) synthesis tool, the industry-leading development environment delivered by the Xilinx XtremeDSP(TM) solution.
With support for the new Virtex(R)-5 FXT platform, the newest release delivers the industry's first ESL design methodology to enable a direct...
preview:
http://press.xilinx.comdate: 4/18/2008
With PADS® I/O Designer, you can easily create legal FPGA pin assignments—up to 50% times faster—with its correct-by-construction, drag and drop functionality.
By reducing design cycle time, I/O Designer accelerates time to market, enabling your company to compete in the ever-changing electronics market.
I/O Designer follows major FPGA vendor rules for correct I/O assignments.
It also eliminates re-spin risk, improves PCB performance, and reduces routing congestion.
View the free demo.
