SEO Training
Even in hi-tech, getting your company to the top of Google is important. Also using Social Media Marketing! Learn how!

Free Embedded Systems
News by Keyword
Cool, free stuff!

rtos    

ThreadX®
ThreadX is the leading royalty-free real-time operating system (RTOS) for embedded applications. ThreadX offers the lowest cost solution among commercial RTOSes, the highest performance, and the greatest ease of use. It has been deployed in over 750 million manufactured products, making it among the most widely deployed RTOS products in the world. ThreadX is provided in full source code form and is 100% royalty-free.
preview: http://www.rtos.com   |

rtos    

eCos home page
Open source, royalty-free, real-time operating system intended for embedded applications. The highly configurable nature of eCos allows the operating system to be customised to precise application requirements, delivering the best possible run-time performance and an optimised hardware resource footprint. Supports ARM, Xscale, Renesas H8, x86, 68K, MIPS, PowerPC, Sparc, SuperH, and many others.
preview: http://ecos.sourceware.org   |

overview    

Introduction to the MIPS Processor
The processor we will be considering in this tutorial is the MIPS processor. The MIPS processor, designed in 1984 by researchers at Stanford University, is a RISC (Reduced Instruction Set Computer) processor. Compared with their CISC (Complex Instruction Set Computer) counterparts (such as the Intel Pentium processors), RISC processors typically support fewer and much simpler instructions.
preview: http://www.web-ee.com   |

overview    

MIPS @ Wikipedia
MIPS (originally an acronym for Microprocessor without Interlocked Pipeline Stages) is a RISC microprocessor architecture developed by MIPS Technologies. By the late 1990s it was estimated that one in three RISC chips produced were MIPS-based designs.[citation needed] MIPS designs are currently primarily used in many embedded systems such as the Series2 TiVo, Windows CE devices, Cisco routers, and video game consoles like the Nintendo 64...
preview: http://en.wikipedia.org   |

newsgroup    

comp.sys.mips
MIPS-related discussions. Unfortunately, very few posts - mainly spam.
preview: http://groups.google.com   |

project    

debian-mips and debian-mipsel
The Mips port is actually two ports, 'debian-mips' and 'debian-mipsel'. They differ at the endianness of the binaries. The Mips CPUs are able to run at both endiannesses, but since that's normally not changeable in software, we need to have both architectures. SGI machines (SGI Indy and Indigo2) are running big-endian which is debian-mips. Digital Decstations are running little-endian, debian-mipsel.
preview: http://www.debian.org   |

article    

Nonintrusive visibility into multicore SoCs
Today, with goals of achieving the best computing power per unit area (MIPS/square millimeter) and computing power per unit power (MIPS/mW), many processor designs are moving to multicore technology to distribute the processing load across cores running at lower clock frequencies. As multicore designs proliferate, one of the biggest challenges for developers is gaining nonintrusive visibility into the processor cores and their...
preview: http://www.embedded-computing.com   date: 11/13/2009 |