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Aldec® and Doulos®: Migrating to Transaction-Level Modeling in SystemC
SystemC is a mature modeling language for electronic systems. Since 2001, SystemC has offered a standard solution for building reference models for the purposes of system validation and functional verification, complementing the use of VHDL or Verilog for hardware design. More recently, SystemC has provided the foundation for the TLM-2.0 standard, which addresses the Transaction-Level Modeling of virtual platforms for software development...
preview: http://www.aldec.com   date: 1/29/2009

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Willamette HDL, Inc.
We offer SystemVerilog and SystemC training courses at all levels of experience plus Verilog, VHDL, C++ and other tool languages. Through our worldwide partnerships we can deliver the exact same training to all your teams, no matter where they are located. When choosing a training partner, ask about customization. Whether we teach at your site or in our training center in Beaverton OR, every course can be fully customized to your exact...
preview: http://www.whdl.com  

resource    

Search Engine - Something about SystemC
Eventually, the search got updated. Links are now updated to properly point to messages of the new SystemC.org web site. The system still uses threads as they were grouped in the original SystemC.org site. This is different from the latest: with the latest site, threads do not cross months. So search results display all the messages of a thread....
preview: http://panoramis.free.fr