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overview    

DRAM @ Wikipedia
Dynamic random access memory (DRAM) is a type of random access memory that stores each bit of data in a separate capacitor within an integrated circuit. Since real capacitors leak charge, the information eventually fades unless the capacitor charge is refreshed periodically. Because of this refresh requirement, it is a dynamic memory as opposed to SRAM and other static memory. Its advantage over SRAM is its structural simplicity: only one...
preview: http://en.wikipedia.org  

overview    

Make Your SOC Design a Winner: Select the Right Memory IP
The 2000 SIA roadmap shows over 50 % of the area in an SOC being occupied by embedded memory. The selection of the memory IP and supplier is critical to the success of the design and the ramp to volume. The Memory IP can determine yield, reliability, cost, speed and/or power. Mr. Ratford will help you navigate through the evaluation process by discussing key requirements and possible solutions when evaluating memory for your next SOC design.
preview: http://www.sigda.org   date: 1/1/2002

overview    

SRAM @ Wikipedia
Static random access memory (SRAM) is a type of semiconductor memory. The word "static" indicates that the memory retains its contents as long as power remains applied, unlike dynamic RAM (DRAM) that needs to be periodically refreshed (nevertheless, SRAM should not be confused with read-only memory and flash memory, since it is volatile memory and preserves data only while power is continuously applied). SRAM should not be confused with...
preview: http://en.wikipedia.org  

webinar    

Memory Optimization Techniques for High-Speed Video SoCs
DTV manufacturers continue to push for improved picture quality and higher resolution — all with additional features at lower price points. These requirements are driving further integration along with increased bandwidth requirements for DTV SoCs (System-on-a-Chip). This increased SoC complexity necessitates the ability to look at data flows through the system and their impact on memory efficiency. Graphics processors, display...
preview: http://www.techonline.com   date: 4/7/2009

webinar    

Solving High-Speed DDR SI and Probing Challenges
The speed of DDR (Double Data Rate) memory technology has increased rapidly in the last few years. The latest DDR3 technology is operating over 1.6GT/s and at the same time, the signal amplitude has decreased to reduce power consumption. With faster and smaller signals, the designs have fewer margins for error, thus having good signal integrity is important to guarantee reliable system operation. On top of that, a huge DDR validation...
preview: http://www.techonline.com   date: 1/13/2009

webinar    

Tips to Debug DDR Parametric and Protocol Measurements with an MSO
DDR memory system debug and validation work require debug tools that can provide comprehensive parametric and protocol measurement. Are you looking for an affordable solution that will provide the capability to verify your DDR system? This presentation will review the tips of using a mix signal oscilloscope as a one box solution in making DDR parametric and protocol measurement.
preview: http://www.techonline.com   date: 10/1/2009