 
SHARC Processor Evaluation Kit Limited Time Offer
Analog Devices is offering a 50% discount on new SHARC Processor Family evaluation kits until July 31, 2008.
The SHARC Processor fits into a variety of applications such as Digital Home, Pro Audio, Industrial and Instrumentation, Automotive, Military, and Medical.
The following kits will be discounted to $249 through your local Distributor: ADZS-21262-EZLITE, ADZS-21364-EZLITE, ADZS-21369-EZLITE, and ADZS-21375-EZLITE.
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personal page
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DFT Digest.com
Hi! My name is John Ford, and I write this blog.
I have been working in this industry for a little over 23 years (gasp!) in various engineering capacities: test (digital and mixed-signal), DFT, verification, and some design automation.
I like doing a variety of things.
The bulk of my career has been in Southern California, for companies such as Western Digital, Silicon Systems, and Texas Instruments.
Just recently I worked for...
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http://www.dftdigest.com
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newsgroup
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Design For Test Forum
Design For Test Forum The forum is to discuss everything related to Design For Test Skip to content Advanced search HomeBoard index Change font size FAQ Register Login It is currently Wed Apr 02, 2008 11:54 pm View unanswered posts • View active topics Forum Topics Posts Last post Discussions Wanna discuss the past, the present and future of DFT. Confused on which tool and menthodology to use. All such discussion go here....
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http://dft.semiconductorforums.com
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hot list
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Design For Test - Links
Links to Design For Test sites, including a nice set of links to the IEEE standards affecting test.
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http://www.dft.co.uk
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vendor
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Courses & Consulting on Digital Design-For-Test
Bennetts Associates is a UK-based consultancy specialising in Design-For-Test (DFT), covering the design and application of Internal Scan, BIST and Boundary Scan to electronics devices, boards and system.
The principal partner is Dr R G 'Ben' Bennetts, a DFT engineer with over 35 years experience in the electronics design and test industry.
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http://www.dft.co.uk
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paper
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Brief Introduction to the JTAG Boundary Scan Interface
One of the difficult areas in the development of any modern hardware system is the production-testing of the Printed Circuit Boards (PCBs). This is the problem addressed by the IEEE standard number 1149 "Standard Test Access Port and Boundary-Scan Architecture".
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http://www.inaccessnetworks.com
date: 11/8/2001
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conference
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International Test Conference
The world's premier conference dedicated to electronic test technology, covering the complete cycle from design verification, test, diagnosis, failure analysis back to process and design improvement.
preview:
http://www.itctestweek.org
date: 10/23/2007
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publication
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IEEE Design and Test of Computers
Offers original works describing the methods used to design and test electronic product hardware and supportive software.
The magazine focuses on current and near-future practice, and includes tutorials, how-to articles, and real-world case studies.
preview:
http://www.computer.org
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