 
MeshNetics - 802.15.4 / ZigBee Wireless RF Modules
MeshNetics is a creator of easy-to-integrate 802.15.4 / ZigBee wireless RF modules and ZigBee PRO-certified mesh networking software, used by OEMs and system integrators to add wireless connectivity to their products and solutions.
MeshNetics RF modules feature industry-leading range performance, long battery life and ultra-small footprint.
They are designed for use in 868/915 MHz and 2.4 GHz frequency bands.
MeshNetics is a single source of ZigBee modules, development tools, networking software, technical support, and design services.
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overview
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Boundary-Scan Tutorial
Since its introduction as an industry standard in 1990, boundary-scan (also known as JTAG) has enjoyed growing popularity for board level manufacturing test applications.
Boundary-scan has rapidly become the technology of choice for building reliable high technology electronic products with a high degree of testability.
Due to the low-cost and IC level access capabilities of boundary-scan, its use has expanded beyond traditional board test...
preview:
http://www.corelis.com
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overview
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Design For Test @ Wikipedia
Design for Test (aka 'Design for Testability' or 'DFT') is a name for design techniques that add certain testability features to a microelectronic hardware product design.
The premise of the added features is that they make it easier to develop and apply manufacturing tests for the designed hardware.
The purpose of manufacturing tests is to validate that the product hardware contains no defects that could adversely affect the product’s...
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http://en.wikipedia.org
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overview
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Joint Test Action Group (JTAG) @ Wikipedia
Joint Test Action Group (JTAG) is the usual name used for the IEEE 1149.1 standard entitled Standard Test Access Port and Boundary-Scan Architecture for test access ports used for testing printed circuit boards using boundary scan.
JTAG was an industry group formed in 1985 to develop a method to test populated circuit boards after manufacture.
At the time, multi-layer boards and non-lead-frame ICs were becoming standard and making...
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http://en.wikipedia.org
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portal
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Design for Test.com
Portal with news and links on the DFT sector.
preview:
http://www.design-for-test.com
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portal
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www.boundary-scan.co.uk
Thank you for visiting our web-site.
We hope that the information gathered here will provide an introduction and help to ‘de-mystify’ the technologies of boundary-scan (aka JTAG and IEEE 1149). The technology pages deal with the nuts & bolts of the main standard IEEE 1149.1 or ‘dot 1’ for short and also newer emerging standards such as IEEE 1149.6 ‘dot 6’ and also IEEE 1532 or ‘ISC’. (In-system configuration). The application...
preview:
http://www.boundary-scan.co.uk
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archive
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Design-for-test Technical Publications
Titles include * Embedded Deterministic Test for Low Cost Manufacturing (ITC 2002) * Reducing Simulation Mismatches in Design-for-Test (DFT) Implementation * TestKompress with EDT Technology: Reducing Time and Expense in Test * Embedded Deterministic Test - DFT Technology for Low-Cost IC Manufacturing Test * Using FastScan Diagnostics to Improve Time-to-Volume
preview:
http://www.mentor.com
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archive
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DAFCA White Papers
Topics include: * The System-on-Chip Integration Challenge: The Need for Design-For-Debug Tools and Technologies * The SoC Revolution Means More Bugs in Silicon: How Will You Deal With Them? * In-Silicon Solutions for Silicon Debug
preview:
http://www.dafca.com
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