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overview    

Boundary-Scan Tutorial
Since its introduction as an industry standard in 1990, boundary-scan (also known as JTAG) has enjoyed growing popularity for board level manufacturing test applications. Boundary-scan has rapidly become the technology of choice for building reliable high technology electronic products with a high degree of testability. Due to the low-cost and IC level access capabilities of boundary-scan, its use has expanded beyond traditional board test...
preview: http://www.corelis.com   |

overview    

Built-in self-test (BIST) @ Wikipedia
A built-in self-test (BIST) mechanism within an integrated circuit (IC) is a function that verifies all or a portion of the internal functionality of the IC. For example, a BIST mechanism is provided in advanced fieldbus systems to verify functionality. At a high level this can be viewed similar to the PC BIOS's Power-On Self-Test (POST) that performs a self-test of the RAM and buses on power-up.Alternative definition can be Built-in Self...
preview: http://en.wikipedia.org   |

overview    

Design For Test @ Wikipedia
Design for Test (aka 'Design for Testability' or 'DFT') is a name for design techniques that add certain testability features to a microelectronic hardware product design. The premise of the added features is that they make it easier to develop and apply manufacturing tests for the designed hardware. The purpose of manufacturing tests is to validate that the product hardware contains no defects that could adversely affect the product’s...
preview: http://en.wikipedia.org   |

overview    

Joint Test Action Group (JTAG) @ Wikipedia
Joint Test Action Group (JTAG) is the usual name used for the IEEE 1149.1 standard entitled Standard Test Access Port and Boundary-Scan Architecture for test access ports used for testing printed circuit boards using boundary scan. JTAG was an industry group formed in 1985 to develop a method to test populated circuit boards after manufacture. At the time, multi-layer boards and non-lead-frame ICs were becoming standard and making...
preview: http://en.wikipedia.org   |

conference    

Microprocessor Test and Verification (MTV'09)
The purpose of MTV'09 is to bring together researchers and practitioners from all areas of work related to verification and test in order to exchange innovative ideas and present new methodologies for solving the challenges facing us today in various processor and SOC design environments. The workshop will take place in Austin, Texas, the live music capital of the world. Areas of Interest Validation of microprocessors and SOCs...
preview: http://mtv.ece.ucsb.edu   date: 12/7/2009 |

conference    

International Test Conference
The world's premier conference dedicated to electronic test technology, covering the complete cycle from design verification, test, diagnosis, failure analysis back to process and design improvement.
preview: http://www.itctestweek.org   date: 11/1/2009 |

conference    

International Symposium on Quality Electronic Design
ISQED is a premier Design and Design Automation conference, held in technical sponsorship of IEEE EDS, IEEE CPMT, and in cooperation with IEEE CASS, ACM/sigDA. ISQED is the pioneer and leading conference dealing with design for manufacturability, design for yield, design for reliability, and design for quality issues, front to back.
preview: http://www.isqed.org   date: 3/16/2009 |