Innovative Integration
Innovative Integration provides board-level hardware products that integrate the best analog I/O and reconfigurable FPGAs to provide cost-effective solutions for challenging data acquisition and signal processing applications.

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ASIC Design For Signal Processing
ASIC is an acronym for Application Specific Integrated Circuit. It refers to the technology that many chip designers, including Lucent, use for the physical creation of their chips. This project focuses heavily on the creation of such a design, which will be incorporated as part of one of Bell Lab's future research chips.
preview: http://www.geoffknagge.com   |

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Jeff's ASIC Tools Page
This page contains a number of tools I have written which are useful for ASIC design. They are written in perl, or ANSI C, and all have the GNU GPL license. I hope you find them as useful as I do. All I ask is that you drop me a note if you find them helpful. Verilog tools.
preview: http://www.kwcpa.com   |

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World of ASIC (Personal Page)
There just isn't a great source of detailed VLSI/DIGITAL information out there. If I actually keep this up, this should be it. However, unless people take an active interest and submit some ideas, tutorials, examples, may be some cores etc., it may die very soon.
preview: http://www.asic-world.com   |

overview    

Application-specific integrated circuit @ Wikipedia
An application-specific integrated circuit (ASIC) is an integrated circuit (IC) customised for a particular use, rather than intended for general-purpose use. For example, a chip designed solely to run a cell phone is an ASIC. In contrast, the 7400 series and 4000 series integrated circuits are logic building blocks that can be wired together to perform many different applications. Intermediate between ASICs and standard products are...
preview: http://en.wikipedia.org   |

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ASIC Overview
Overview to ASIC's (basic).
preview: http://www.radio-electronics.com   |

paper    

ASIC Prototyping with FPGAs
Recently, there is a growing use of FPGAs to prototype ASICs as part of an ASIC verification methodology. With development costs for ASICs approaching $20M, avoiding a respin by prototyping with FPGAs is attractive alternative. This paper explorers the key issues designers should consider when developing and ASIC prototyping methodology.
preview: http://www.mentor.com   |

paper    

FPGA vs. ASICs
Quick summary from Xilinx of the pros and cons of each.
preview: http://www.xilinx.com   |