SHARC Processor Evaluation Kit Limited Time Offer
Analog Devices is offering a 50% discount on new SHARC Processor Family evaluation kits until July 31, 2008. The SHARC Processor fits into a variety of applications such as Digital Home, Pro Audio, Industrial and Instrumentation, Automotive, Military, and Medical. The following kits will be discounted to $249 through your local Distributor: ADZS-21262-EZLITE, ADZS-21364-EZLITE, ADZS-21369-EZLITE, and ADZS-21375-EZLITE.

Mocana NanoSSH Embedded SSH Client & Embedded SSH Server

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Muscular Methods for Mammoth Designs
This paper first considers significant technical trends in embedded system designs. Conventional embedded design and verification techniques are then reviewed. Finally, the concept of architecture-driven design using virtual system prototyping is presented and discussed. [Multi-core]
preview: http://www.vastsystems.com   date: 1/1/2004

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A Guide to Wireless Handset Processors (Paid Research Report)
Despite the lure of a billion-unit market, wireless handsets are one of the most difficult markets for semiconductor vendors to compete in. At the low end, cost pressures are pushing vendors to integrate the cellular baseband with analog functions such as power management and RF transceivers, creating single-chip cell phones. At the high end, vendors must keep up with the newest air interfaces, such as HSDPA and HSUPA, while adding...
preview: http://www.linleygroup.com   date: 6/1/2007

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SOC Drawer - SoC drawer: The resource view Resource allocation can determine system architecture
A system-on-a-chip (SoC) can provide a single-chip solution, lower power usage, better performance, more frugal use of board real estate, simpler integration, and lower part counts. Compared to multichip solutions, the SoC has huge advantages, but mistakes in sizing on-chip resources require spinning the ASIC and result in high cost. This article introduces approaches for SoC design from a resource perspective. The SoC design concept has...
preview: http://www-128.ibm.com  

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Semiconductor Application Reports
Application notes from Texas Instruments. Category Application Notes for: > DSP > Analog & Mixed-Signal > Digital Logic > FIFOs
preview: http://www.ti.com  

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White Papers and University Research
Implementation and Evaluation of a Dynamically Routed Processor Operand Network, Distributed Microarchitectural Protocols in the TRIPS Prototype Processor, Dataflow Predication, Critical Path Analysis of the TRIPS Microprocessor, Limits on Thread-Level Speculative Parallelism in Embedded Applications, Challenges in Exploitation of Loop Parallelism in Embedded Applications, Execution Schemes for Dynamically Reconfigurable Architectures,...
preview: http://www.eembc.com  

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The Cell Broadband Engine™ Vault Processor Security Architecture: Hardware security solutions
The unrelenting evolution toward an even more open and connected computing infrastructure requires robust security to thrive. Learn how the Cell Broadband Engine™ processor’s security architecture is uniquely suited for the challenges of this digital future.
preview: http://www.vmebus-systems.com   date: 2/13/2007

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White Paper: The Cell Broadband Engine processor security architecture
As computers and consumer electronics devices become more connected, platform security becomes increasingly important for everyone from consumers to businesses. For consumers, privacy of data such as credit card numbers and social security numbers have always been of concern, but now new technologies such as voice-over-IP and personal video blogs bring new privacy concerns. And for entertainment content owners, piracy is a major concern as the...
preview: http://dsp-fpga.com   date: 1/19/2007